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| N-Channel Dual JFET CORPORATION U421 - U426 FEATURES DESCRIPTION The Calogic U421 Series are Dual N-Channel JFETs on a monolithic structure designed specifically for very high input impedance for differential amplification and impedance matching. This series features ultra low input bias current (250 fempto amps, U421) while offering high gain at low operating currents and tight matching characteristics. These devices are available in chip form for hybrid designs as well as a hermetic TO-78 package. ORDERING INFORMATION Part Package Temperature Range U421-U426 TO-78 Hermetic Package -55oC to +150oC XU421-U426 Sorted Chips in Carriers -55oC to +150oC * Ultra Low Input Bias Current . . . . . . . 250 Fempto Amps * Low Operating Current * Tight Matching Characteristics * Ultra Low Leakage FET Input Op Amps * Electrometer * Infrared Detectors * pH Meters APPLICATIONS PIN CONFIGURATION TO-78 1 2 3 4 5 6 7 SOURCE 1 DRAIN 1 GATE 1 CASE/BODY SOURCE 2 DRAIN 2 GATE 2 45 3 2 1 6 7 BOTTOM VIEW C S2 G1 D2 D1 G2 S1 CJ4 U421 - U426 CORPORATION ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted) Gate-to-Gate Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . -40V Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Device Dissipation (Each Side), TA = 25oC (Derate 3.2 mW/ oC to 150oC) . . . . . . . . . . . . . . 400mW o ELECTRICAL CHARACTERISTICS (25oC Unless otherwise noted) ELECTRICAL CHARACTERISTICS (25 C unless otherwise noted) Total Device Dissipation, TA = 25oC (Derate 6.0 mW/ oC to 150oC) . . . . . . . . . . . . . 750 mW Storage Temperature Range . . . . . . . . . . . . . -65oC to +150oC SYMBOL STATIC BVGSS BVG1G2 IGSS CHARACTERISTIC U421-3 MIN -40 40 1.0 1.0 TYP MAX -60 MIN -40 40 U424-6 TYP -60 MAX UNIT TEST CONDITIONS Gate-Source Breakdown Voltage Gate-Gate Breakdown Voltage Gate Reverse Current (1) V 3.0 3.0 0.5 -500 pA nA pA IG = -1A, VDS = 0 IG = -1A, ID = 0, IS = 0 T = +25oC T = +125 oC T = +25oC T = +125 oC VGS = -20V, VDS = 0 VDG = 10V, ID = 30A IG VGS (off) VGS IDSS DYNAMIC gfs gos Ciss Crss gfs gos en NF Gate Operating Current (1) .25 .250 Gate-Source Cutoff Voltage Gate-Source Voltage Saturation Drain Current -0.4 -2.0 -1.8 -0.4 -2.0 -2.9 V A VDS = 10V, ID = 1nA VDG = 10V, ID = 30A VDS = 10V, VGS = 0 60 1000 60 1800 Common-Source Forward Transconductance Common-Source Output Conductance Common-Source Input Capacitance Common-Source Reverse Transfer Capacitance Common-Source Forward Transconductance Common-Source Output Conductance Equivalent Short Circuit Input Noise Figure 300 1500 10 3.0 1.5 300 1500 10 3.0 1.5 pF VDS = 10V, VGS = 0 f = 1 kHz f = 1MHz 120 350 3.0 20 10 1.0 70 120 350 3.0 20 10 1.0 70 nV/ Hz dB VDG = 10V, ID = 30A f = 1kHz f = 10Hz f = 1kHz f = 10 Hz RG = 10 M SYMBOL MATCH CHARACTERISTIC U421,4 U422,5 U423,6 MIN TYP MAX MIN TYP MAX MIN TYP MAX 10 10 90 95 80 90 15 25 80 90 25 40 UNIT TEST CONDITIONS | VGS1-VGS2 | Differential Gate-Source Voltage | VGS1-VGS2 | Differential Gate-Source Voltage Change with Temperature (2) T CMRR Common Mode Rejection Ratio (3) mV V/ oC dB VDG = 10V, ID = 30A VDG = 10V, ID = 30A, TA = -55oC, TB = 25oC, TC = 125oC ID = 30A, VDG = 10 to 20 V NOTES: 1. Approximately doubles for every 10oC increase in TA. 2. Measured at endpoints TA, TB and TC. 3. CMRR = 20log 10 [VGS1DDGS2 ] -V V VDD = 10V. 4. Case lead not connected. |
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